Re: [PATCH V3] dt-bindings: nvmem: convert base example to use "nvmem-layout" node

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On 10/03/2023 07:51, Rafał Miłecki wrote:
From: Rafał Miłecki <rafal@xxxxxxxxxx>

With support for "fixed-layout" binding we can use now "nvmem-layout"
even for fixed NVMEM cells. Use that in the base example as it should be
preferred over placing cells directly in the device node.

Fixed layouts are the core part of nvmem, am not sure why you want to deprecate this. Either we derive the cell information dt or via layouts or some post processing they should still endup as fixed layouts. this way the core part is always same irrespective of where the cell info comes from.


--srini

New and other bindings should follow as old binding will get deprecated
at some point.

Signed-off-by: Rafał Miłecki <rafal@xxxxxxxxxx>
---
  .../devicetree/bindings/nvmem/nvmem.yaml      | 42 +++++++++++--------
  1 file changed, 24 insertions(+), 18 deletions(-)

diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
index 732162e9d13e..c77be1c20e47 100644
--- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
+++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
@@ -67,24 +67,30 @@ examples:
/* ... */ - /* Data cells */
-          tsens_calibration: calib@404 {
-              reg = <0x404 0x10>;
-          };
-
-          tsens_calibration_bckp: calib_bckp@504 {
-              reg = <0x504 0x11>;
-              bits = <6 128>;
-          };
-
-          pvs_version: pvs-version@6 {
-              reg = <0x6 0x2>;
-              bits = <7 2>;
-          };
-
-          speed_bin: speed-bin@c{
-              reg = <0xc 0x1>;
-              bits = <2 3>;
+          nvmem-layout {
+              compatible = "fixed-layout";
+              #address-cells = <1>;
+              #size-cells = <1>;
+
+              /* Data cells */
+              tsens_calibration: calib@404 {
+                  reg = <0x404 0x10>;
+              };
+
+              tsens_calibration_bckp: calib_bckp@504 {
+                  reg = <0x504 0x11>;
+                  bits = <6 128>;
+              };
+
+              pvs_version: pvs-version@6 {
+                  reg = <0x6 0x2>;
+                  bits = <7 2>;
+              };
+
+              speed_bin: speed-bin@c{
+                  reg = <0xc 0x1>;
+                  bits = <2 3>;
+              };
            };
        };



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