On Tue, Mar 7, 2023 at 2:40 PM Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> wrote: > On 07/03/2023 14:32, Linus Walleij wrote: > > On Thu, Mar 2, 2023 at 4:52 PM Krzysztof Kozlowski > > <krzysztof.kozlowski@xxxxxxxxxx> wrote: > > > >> The description of second IO address is a bit confusing. It is supposed > >> to be the MCC range which contains the slew rate registers, not the slew > >> rate register base. The Linux driver then accesses slew rate register > >> with hard-coded offset (0xa000). > >> > >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > > > > LGTM, is this something I should just apply or will you collect a larger > > series of Qcom DT patches this time around as well? > > Please grab it. I think I cleaned up Qualcomm pinctrl bindings from > technical debt, thus no more work for me! OK patch applied! Also: good job! The Qualcomm bindings look very nice now. But what about these oldskool bindings? $ ls Documentation/devicetree/bindings/pinctrl/qcom,*.txt Documentation/devicetree/bindings/pinctrl/qcom,apq8064-pinctrl.txt Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt Documentation/devicetree/bindings/pinctrl/qcom,apq8084-pinctrl.txt Documentation/devicetree/bindings/pinctrl/qcom,ipq8064-pinctrl.txt Yours, Linus Walleij
