On 09/03/2023 10:58, Geert Uytterhoeven wrote: >>>>> Here it is, Please let me know is it ok? >>>>> >>>>> renesas,output-clock-fixed-rate-mode: >>>>> type: boolean >>>>> description: >>>>> In output clock fixed rate mode, the output clock frequency is >>>> always >>>>> fixed and the hardware will use the values from the OTP or full >>>> register >>>>> map initialized during boot. >>>>> If not given, the output clock rate is not fixed. >>>>> maxItems: 6 >>>> >>>> boolean is scalar, not array, so no maxItems. If the frequency is taken from >>>> OTP or register map, why they cannot also provide information the clock is >>>> fixed? >>> >>> OK, I will make an array property instead. From HW perspective each clock output from the >>> Clock generator is controllable ie, fixed rate or dynamic rate. >>> >>> If all the output clocks are fixed rate one, then frequency is taken from OTP or >>> register map. But if any one clock output generates dynamic rate, then it uses >>> dynamic settings. >> >> Second try, same question, let me know if it is not clear: >> >> "why they cannot also provide information the clock is fixed?" > > What is the actual use case? > My understanding is: > 1. If the OTP is programmed, the clock generator will be configured > from the OTP on power-on, > 2. The clock generator can be (re)configured from software. > a. If the OTP is programmed, this is not needed, > b. For critical clocks, you may want to prevent this. > > Also, AFAIUI, "fixed frequency" or "dynamic frequency" is a policy, > and purely software? Or are there OTP bits to enforce this? > > Perhaps you need a per-output "do-not-change-frequency" flag, > probably with a generic name, in the spirit of "regulator-always-on" > for regulators? > > Now, if all the output clocks are fixed rate, you might want to describe > this in DTS using a set of fixed{,-factor-}-clocks? > I would also argue that fixed frequency is actually also dynamic frequency, just with a limit to one frequency... Best regards, Krzysztof