From: Philippe Schenker <philippe.schenker@xxxxxxxxxxx>
Add a separate pinctrl group for chip-select 2 for Colibri SPI. That way
one is able to use it separately.
Signed-off-by: Philippe Schenker <philippe.schenker@xxxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index d4d748a93afc..2cc94589c36f 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -120,7 +120,7 @@ &usdhc2 {
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
- <&pinctrl_hog2>;
+ <&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>;
/* On-module touch pen-down interrupt */
pinctrl_ad7879_int: ad7879intgrp {
@@ -231,7 +231,6 @@ pinctrl_hog0: hog0grp {
<IMX8QXP_CSI_D07_CI_PI_D09 0x61>, /* SODIMM 65 */
<IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20>, /* SODIMM 96 */
<IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020>, /* SODIMM 85 */
- <IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020>, /* SODIMM 65 */
<IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20>, /* SODIMM 69 */
<IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20>, /* SODIMM 99 */
<IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20>, /* SODIMM 105 */
@@ -327,6 +326,10 @@ pinctrl_lpspi2: lpspi2grp {
<IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040>; /* SODIMM 92 */
};
+ pinctrl_lpspi2_cs2: lpspi2cs2grp {
+ fsl,pins = <IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x21>; /* SODIMM 65 */
+ };
+
/* Colibri UART_B */
pinctrl_lpuart0: lpuart0grp {
fsl,pins = <IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020>, /* SODIMM 34 */
--
2.39.2
