On 8.03.2023 13:36, Stephan Gerhold wrote:
> The reg address of the tsens_mode nvmem cell is correct but the unit
> address does not match (0xec vs 0xef). Fix it. No functional change.
>
> Fixes: 24aafd041fb2 ("arm64: dts: qcom: msm8916: specify per-sensor calibration cells")
> Signed-off-by: Stephan Gerhold <stephan.gerhold@xxxxxxxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 0733c2f4f379..0d5283805f42 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -503,7 +503,7 @@ tsens_base2: base2@d7 {
> bits = <1 7>;
> };
>
> - tsens_mode: mode@ec {
> + tsens_mode: mode@ef {
> reg = <0xef 0x1>;
> bits = <5 3>;
> };
