Add iommu support in the SoC DTS using the 4 local arbiters (LARBs)
Signed-off-by: Alexandre Mergnat <amergnat@xxxxxxxxxxxx>
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index db0b897f58bb..c713471c59dc 100644
--- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
@@ -456,6 +456,14 @@ sysirq: interrupt-controller@10200a80 {
reg = <0 0x10200a80 0 0x20>;
};
+ iommu: iommu@10205000 {
+ compatible = "mediatek,mt8365-m4u";
+ reg = <0 0x10205000 0 0x1000>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, <&larb3>;
+ #iommu-cells = <1>;
+ };
+
infracfg_nao: infracfg@1020e000 {
compatible = "mediatek,mt8365-infracfg", "syscon";
reg = <0 0x1020e000 0 0x1000>;
--
b4 0.10.1
