Quoting Jeremy Kerr (2023-03-01 16:58:31) > The current ast2600 I3C clock definitions are top-level (rather than > based on their actual hw sources: either HCLK or APLL), and include a > couple of definitions for (non-existent) i3c6 and i3c7. > > Re-parent the individual I3C controller clocks to the main i3c clock, > explicitly sourced from the APLL rather than whatever G6_CLK_SELECTION5 > was last set to. > > While we're at it, remove the definitions for the i3c6 and i3c7 clock > lines; this hardware isn't present. > > This is a partial cherry-pick and rework of ed44b8cdfdb and 1a35eb926d7 > from Aspeed's own tree, originally by Dylan Hung > <dylan_hung@xxxxxxxxxxxxxx>. > > Signed-off-by: Jeremy Kerr <jk@xxxxxxxxxxxxxxxxxxxx> > > --- Applied to clk-next