On 3/6/2023 4:00 PM, Konrad Dybcio wrote:
On 6.03.2023 06:25, Rohit Agarwal wrote:
Enable PCIE0 PHY on SDX65 MTP for PCIE EP.
Signed-off-by: Rohit Agarwal <quic_rohiagar@xxxxxxxxxxx>
---
Status should go last. It would be nice if you could update
that for the other nodes in this dt while at it.
Yes, Surely will do.
Thanks,
Rohit.
Konrad
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index 85ea02d..86bb853 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -245,6 +245,13 @@
status = "okay";
};
+&pcie0_phy {
+ status = "okay";
+
+ vdda-phy-supply = <&vreg_l1b_1p2>;
+ vdda-pll-supply = <&vreg_l4b_0p88>;
+};
+
&qpic_bam {
status = "okay";
};