On 16.02.2023 13:52, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
>
> Add the SPI controller node for the interface exposed on the sa8775p-ride
> development board.
>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 4666e5341922..eda5d107961b 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -503,6 +503,27 @@ qupv3_id_2: geniqup@8c0000 {
> iommus = <&apps_smmu 0x5a3 0x0>;
> status = "disabled";
>
> + spi16: spi@888000 {
> + compatible = "qcom,geni-spi";
> + reg = <0x0 0x888000 0x0 0x4000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
Meh, I sorta frown upon placing it here but it's been like that
everywhere else.. If nobody else complains, I won't either.
> + interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
> + clock-names = "se";
> + interconnects = <&clk_virt MASTER_QUP_CORE_2 0
#include <dt-bindings/interconnect/qcom,icc.h>
0 -> QCOM_ICC_TAG_ALWAYS
Konrad
> + &clk_virt SLAVE_QUP_CORE_2 0>,
> + <&gem_noc MASTER_APPSS_PROC 0
> + &config_noc SLAVE_QUP_2 0>,
> + <&aggre2_noc MASTER_QUP_2 0
> + &mc_virt SLAVE_EBI1 0>;
> + interconnect-names = "qup-core",
> + "qup-config",
> + "qup-memory";
> + power-domains = <&rpmhpd SA8775P_CX>;
> + status = "disabled";
> + };
> +
> i2c18: i2c@890000 {
> compatible = "qcom,geni-i2c";
> reg = <0x0 0x890000 0x0 0x4000>;
