This series adds support for the IMG Multi-threaded DMA Controller (MDC) which is found on IMG SoCs. Currently this driver only supports the variant found on the MIPS-based Pistachio SoC. The MDC supports slave and memory-to-memory transfers on up to 32 channels. Requests from channels are handled by MDC threads. Thread assignments are per-channel and are specified in the device-tree. Tested on a platform based on the Pistachio SoC with additional patches. Support for Pistachio will be submitted later. Slave DMA was tested with the recently submitted IMG SPFI driver [1] and memory-to-memory DMA was tested with the dmatest module. Based on Vinod's slave-dma/next + Maxime's device_control and slave caps cleanup series [2]. Changes from v1: - addressed Arnd's review comments - rebased on Maxime's dmaengine cleanups [1] https://lkml.org/lkml/2014/11/12/763 [2] https://lkml.org/lkml/2014/10/28/1067 Andrew Bresticker (2): dmaengine: Add binding document for IMG MDC dmaengine: Add driver for IMG MDC .../devicetree/bindings/dma/img-mdc-dma.txt | 57 ++ drivers/dma/Kconfig | 9 + drivers/dma/Makefile | 1 + drivers/dma/img-mdc-dma.c | 973 +++++++++++++++++++++ 4 files changed, 1040 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/img-mdc-dma.txt create mode 100644 drivers/dma/img-mdc-dma.c -- 2.1.0.rc2.206.gedb03e5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
