Re: [PATCH v4 00/19] Enable GPU with DVFS support on MediaTek SoCs

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Il 02/03/23 10:36, Matthias Brugger ha scritto:
Series looks good but from my understanding has a dependency on:
[PATCH v4 00/12] Panfrost: Improve and add MediaTek SoCs support (https://lore.kernel.org/linux-mediatek/20230228102610.707605-1-angelogioacchino.delregno@xxxxxxxxxxxxx/)

Did I get that right?


Yes you got it right - without the mentioned series, this one will do nothing
at all (and will also fail binding checks, as the bindings are introduced in
that other series).

Cheers,
Angelo

Regards,
Matthias

On 01/03/2023 10:55, AngeloGioacchino Del Regno wrote:
Changes in v4:
  - Added a fix for MT8192 Vgpu voltage constraints
  - Changed constraints for MT8192 VSRAM-GPU to reflect the maximum
    achievable voltage as per the actual vsram-vgpu relation constraint

Changes in v3:
  - Changed MT8186 compatibles for new bindings
  - Added min/max voltage overrides for vgpu/vsram_gpu on
    mt8183-pumpkin and evb as suggested by Chen-Yu
  - Cosmetic fixes for "arm64: dts: mediatek: mt8192: Add GPU nodes"

Changes in v2:
  - Changed MT8186 to use only two power domains for the GPU.

We finally have working GPU DVFS on MediaTek SoCs.
On Panfrost.
For real.
...and the best part is that it's going upstream.

In order to get GPU DVFS working, it was necessary to satisfy a
specific constraint (which is different, depending on the SoC)
between two regulators: GPU VCORE and GPU SRAM.
This was done through adding the mtk-regulator-coupler driver,
which transparently manages the voltage relation between these
two vregs, hence completely eliminating the need to manage these
regulators in the Panfrost driver; this solves the long standing
issue with devfreq+opp tables not supporting managing voltages
for two regulators per opp entry out of the box, due to which
we never got GPU DVFS on those SoCs, often locking them out to
a low GPU frequency.

This changes. Right now!

Tested on MT8192, MT8195 Chromebooks.

This series depends on [1].

[1]: https://lore.kernel.org/lkml/20230228102704.708150-1-angelogioacchino.delregno@xxxxxxxxxxxxx/

Alyssa Rosenzweig (2):
   arm64: dts: mediatek: mt8192: Add GPU nodes
   arm64: dts: mediatek: mt8192-asurada: Enable GPU

AngeloGioacchino Del Regno (16):
   arm64: dts: mediatek: mt8183-kukui: Couple VGPU and VSRAM_GPU
     regulators
   arm64: dts: mediatek: mt8183-kukui: Override vgpu/vsram_gpu
     constraints
   arm64: dts: mediatek: mt8183: Remove second opp-microvolt entries from
     gpu table
   arm64: dts: mt8183-pumpkin: Couple VGPU and VSRAM_GPU regulators
   arm64: dts: mediatek: mt8183-evb: Couple VGPU and VSRAM_GPU regulators
   arm64: dts: mediatek: mt8183: Use mediatek,mt8183b-mali as GPU
     compatible
   arm64: dts: mediatek: mt8192: Add mfg_ref_sel clock to MFG0 domain
   arm64: dts: mediatek: mt8192-asurada: Assign sram supply to MFG1 pd
   arm64: dts: mediatek: mt8192-asurada: Fix voltage constraint for Vgpu
   arm64: dts: mediatek: mt8192-asurada: Couple VGPU and VSRAM_OTHER
     regulators
   arm64: dts: mediatek: mt8195: Add mfg_core_tmp clock to MFG1 domain
   arm64: dts: mt8195: Add panfrost node for Mali-G57 Valhall Natt GPU
   arm64: dts: mediatek: mt8195-cherry: Enable Mali-G57 GPU
   arm64: dts: mediatek: mt8186: Add GPU node
   arm64: dts: mediatek: mt8183-pumpkin: Override vgpu/vsram_gpu
     constraints
   arm64: dts: mediatek: mt8183-evb: Override vgpu/vsram_gpu constraints

Nícolas F. R. A. Prado (1):
   arm64: dts: mediatek: mt8192-asurada: Add MFG0 domain supply

  arch/arm64/boot/dts/mediatek/mt8183-evb.dts   |  17 ++-
  .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi |  17 ++-
  .../boot/dts/mediatek/mt8183-pumpkin.dts      |  17 ++-
  arch/arm64/boot/dts/mediatek/mt8183.dtsi      |  34 ++---
  arch/arm64/boot/dts/mediatek/mt8186.dtsi      |  17 +++
  .../boot/dts/mediatek/mt8192-asurada.dtsi     |  24 +++-
  arch/arm64/boot/dts/mediatek/mt8192.dtsi      | 116 +++++++++++++++++-
  .../boot/dts/mediatek/mt8195-cherry.dtsi      |   5 +
  arch/arm64/boot/dts/mediatek/mt8195.dtsi      |  95 +++++++++++++-
  9 files changed, 315 insertions(+), 27 deletions(-)


--
AngeloGioacchino Del Regno
Software Engineer

Collabora Ltd.
Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK
Registered in England & Wales, no. 5513718




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