On Tue, Feb 28, 2023 at 12:48 AM Marek Vasut <marex@xxxxxxx> wrote:
>
> On 2/28/23 07:43, Marek Vasut wrote:
> > On 2/28/23 03:44, Adam Ford wrote:
> >> On Mon, Feb 27, 2023 at 1:37 PM Marek Vasut <marex@xxxxxxx> wrote:
> >>>
> >>> On 2/27/23 19:59, Marco Felsch wrote:
> >>> [...]
> >>>
> >>>>> @@ -344,6 +384,18 @@ &i2c3 {
> >>>>> pinctrl-0 = <&pinctrl_i2c3>;
> >>>>> status = "okay";
> >>>>>
> >>>>> + wm8960: codec@1a {
> >>>>> + #sound-dai-cells = <0>;
> >>>>> + compatible = "wlf,wm8960";
> >>>>> + reg = <0x1a>;
> >>>>
> >>>> The compatible should be the first property followed by the reg
> >>>> property.
> >>>
> >>> See my reply to the mx8mn sound-sai-cells patch , I am not sure here.
> >>> The rest is fixed in V6.
> >>>
> >>>>> + clocks = <&audio_blk_ctrl
> >>>>> IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>;
> >>>>> + clock-names = "mclk";
> >>>>> + wlf,shared-lrclk;
> >>>>> + wlf,hp-cfg = <3 2 3>;
> >>>>> + wlf,gpio-cfg = <1 3>;
> >>>>> + SPKVDD1-supply = <®_audio_pwr>;
> >>>>> + };
> >>>>> +
> >>>>> pca6416: gpio@20 {
> >>>>> compatible = "ti,tca6416";
> >>>>> reg = <0x20>;
> >>>
> >>> [...]
> >>>
> >>>>> @@ -668,6 +730,18 @@ MX8MP_IOMUXC_UART3_TXD__UART1_DCE_RTS 0x140
> >>>>> >;
> >>>>> };
> >>>>>
> >>>>> + pinctrl_sai3: sai3grp {
> >>>>> + fsl,pins = <
> >>>>> +
> >>>>> MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
> >>>>> +
> >>>>> MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
> >>>>> +
> >>>>> MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
> >>>>> +
> >>>>> MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
> >>>>> +
> >>>>> MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6
> >>>>> +
> >>>>> MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0xd6
> >>>>
> >>>> What is gpio04-io28 used for?
> >>>
> >>> Apparently unused, dropped.
> >>
> >> Isn't that the headphone detect GPIO?
> >>
> >> I think simple-audio-card,hp-det-gpio can reference it.
> >
> > Per the schematics of the MX8MP EVK, the pin is not connected on the
> > board-to-board connector EVK side, right ?
>
> Er, correction, that's AUD_NINT, which is WM8960 GPIO1 .
I only went by NXP's downstream device tree. I didn't have the
schematics in front of me. Sorry for the noise.
adam
