On 22/02/2023 19:39, arinc9.unal@xxxxxxxxx wrote: > From: Arınç ÜNAL <arinc.unal@xxxxxxxxxx> > > The RT3352 and RT5350 SoCs each contain different pin muxing information, > therefore, should be split. This can be done now that there are compatible > strings to distinguish them from other SoCs. > > Split the schema out to mediatek,rt3352-pinctrl.yaml and > mediatek,rt5350-pinctrl.yaml. > > Signed-off-by: Arınç ÜNAL <arinc.unal@xxxxxxxxxx> > --- > .../pinctrl/mediatek,rt305x-pinctrl.yaml | 78 +----- > .../pinctrl/mediatek,rt3352-pinctrl.yaml | 247 ++++++++++++++++++ > .../pinctrl/mediatek,rt5350-pinctrl.yaml | 210 +++++++++++++++ > 3 files changed, 462 insertions(+), 73 deletions(-) > create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,rt3352-pinctrl.yaml > create mode 100644 Documentation/devicetree/bindings/pinctrl/mediatek,rt5350-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,rt305x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,rt305x-pinctrl.yaml > index 61fcf3ab1091..1e6c7e7f2fe2 100644 > --- a/Documentation/devicetree/bindings/pinctrl/mediatek,rt305x-pinctrl.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,rt305x-pinctrl.yaml > @@ -11,8 +11,7 @@ maintainers: > - Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> > > description: > - MediaTek RT305X pin controller for RT3050, RT3052, RT3350, RT3352 and RT5350 > - SoCs. > + MediaTek RT305X pin controller for RT3050, RT3052, and RT3350 SoCs. > The pin controller can only set the muxing of pin groups. Muxing individual > pins is not supported. There is no pinconf support. > > @@ -36,21 +35,9 @@ patternProperties: > function: > description: > A string containing the name of the function to mux to the group. > - anyOf: > - - description: For RT3050, RT3052 and RT3350 SoCs > - enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio, > - pcm gpio, pcm i2s, pcm uartf, rgmii, sdram, spi, uartf, > - uartlite] > - > - - description: For RT3352 SoC > - enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, > - lna, mdio, pa, pcm gpio, pcm i2s, pcm uartf, rgmii, spi, > - spi_cs1, uartf, uartlite, wdg_cs1] > - > - - description: For RT5350 SoC > - enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, > - pcm gpio, pcm i2s, pcm uartf, spi, spi_cs1, uartf, > - uartlite, wdg_cs1] > + enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio, > + pcm gpio, pcm i2s, pcm uartf, rgmii, sdram, spi, uartf, > + uartlite] > > groups: > description: > @@ -69,17 +56,7 @@ patternProperties: > then: > properties: > groups: > - anyOf: > - - description: For RT3050, RT3052 and RT3350 SoCs > - enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, > - uartlite] > - > - - description: For RT3352 SoC > - enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs1, > - uartf, uartlite] > - > - - description: For RT5350 SoC > - enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite] > + enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, uartlite] > > - if: > properties: > @@ -126,24 +103,6 @@ patternProperties: > groups: > enum: [jtag] > > - - if: > - properties: > - function: > - const: led > - then: > - properties: > - groups: > - enum: [led] > - > - - if: > - properties: > - function: > - const: lna > - then: > - properties: > - groups: > - enum: [lna] > - > - if: > properties: > function: > @@ -153,15 +112,6 @@ patternProperties: > groups: > enum: [mdio] > > - - if: > - properties: > - function: > - const: pa > - then: > - properties: > - groups: > - enum: [pa] > - > - if: > properties: > function: > @@ -216,15 +166,6 @@ patternProperties: > groups: > enum: [spi] > > - - if: > - properties: > - function: > - const: spi_cs1 > - then: > - properties: > - groups: > - enum: [spi_cs1] > - > - if: > properties: > function: > @@ -243,15 +184,6 @@ patternProperties: > groups: > enum: [uartlite] > > - - if: > - properties: > - function: > - const: wdg_cs1 > - then: > - properties: > - groups: > - enum: [spi_cs1] > - > additionalProperties: false > > additionalProperties: false > diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,rt3352-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,rt3352-pinctrl.yaml > new file mode 100644 > index 000000000000..7a74c1602afc > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,rt3352-pinctrl.yaml > @@ -0,0 +1,247 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/mediatek,rt3352-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek RT3352 Pin Controller > + > +maintainers: > + - Arınç ÜNAL <arinc.unal@xxxxxxxxxx> > + - Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx> > + > +description: > + MediaTek RT3352 pin controller for RT3352 SoC. > + The pin controller can only set the muxing of pin groups. Muxing individual > + pins is not supported. There is no pinconf support. > + > +properties: > + compatible: > + enum: > + - mediatek,rt3352-pinctrl > + - ralink,rt305x-pinctrl > + - ralink,rt2880-pinmux Following Rob's comments, you need to keep old compatibles when splitting binding. Best regards, Krzysztof
