Am Montag, 27. Februar 2023, 12:38:10 CET schrieb Adam Ford:
> On Mon, Feb 27, 2023 at 3:46 AM Alexander Stein
>
> <alexander.stein@xxxxxxxxxxxxxxx> wrote:
> > Hi Marek,
> >
> > thanks for respinning this series.
> >
> > Am Donnerstag, 23. Februar 2023, 18:11:13 CET schrieb Marek Vasut:
> > > Add all SAI nodes, SDMA2 and SDMA3 nodes, and AudioMIX node. This is
> > > needed to get audio operational on i.MX8MP .
> > >
> > > Reviewed-by: Luca Ceresoli <luca.ceresoli@xxxxxxxxxxx>
> > > Tested-by: Luca Ceresoli <luca.ceresoli@xxxxxxxxxxx>
> > > Signed-off-by: Marek Vasut <marex@xxxxxxx>
> > > ---
> > > Cc: Abel Vesa <abelvesa@xxxxxxxxxx>
> > > Cc: Fabio Estevam <festevam@xxxxxxxxx>
> > > Cc: Jacky Bai <ping.bai@xxxxxxx>
> > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
> > > Cc: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> > > Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> > > Cc: Marco Felsch <m.felsch@xxxxxxxxxxxxxx>
> > > Cc: Michael Turquette <mturquette@xxxxxxxxxxxx>
> > > Cc: NXP Linux Team <linux-imx@xxxxxxx>
> > > Cc: Peng Fan <peng.fan@xxxxxxx>
> > > Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>
> > > Cc: Richard Cochran <richardcochran@xxxxxxxxx>
> > > Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> > > Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
> > > Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
> > > Cc: Stephen Boyd <sboyd@xxxxxxxxxx>
> > > Cc: devicetree@xxxxxxxxxxxxxxx
> > > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> > > Cc: linux-clk@xxxxxxxxxxxxxxx
> > > ---
> > > V2: - Add AUDIO_AXI clock to audio gpc
> > >
> > > - Use IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT for SDMA2 IPG clock
> > >
> > > V3: Rename audio_ahb to plain ahb
> > > V4: - Add RB/TB from Luca
> > >
> > > - Rebase on next 20230223
> > >
> > > ---
> > >
> > > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 153 ++++++++++++++++++++++
> > > 1 file changed, 153 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index
> > > ca8093ee4d0e4..56d2a6377a5a6 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > > @@ -571,6 +571,13 @@ pgc_usb2_phy: power-domain@3 {
> > >
> > > reg =
> >
> > <IMX8MP_POWER_DOMAIN_USB2_PHY>;
> >
> > > };
> > >
> > > + pgc_audio: power-domain@5 {
> > > + #power-domain-
> >
> > cells = <0>;
> >
> > > + reg =
> >
> > <IMX8MP_POWER_DOMAIN_AUDIOMIX>;
> >
> > > + clocks = <&clk
> >
> > IMX8MP_CLK_AUDIO_ROOT>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_AUDIO_AXI>;
> >
> > > + };
> > > +
> > >
> > > pgc_gpu2d: power-domain@6 {
> > >
> > > #power-domain-
> >
> > cells = <0>;
> >
> > > reg =
> >
> > <IMX8MP_POWER_DOMAIN_GPU2D>;
> >
> > > @@ -1119,6 +1126,152 @@ opp-1000000000 {
> > >
> > > };
> > >
> > > };
> > >
> > > + aips5: bus@30c00000 {
> > > + compatible = "fsl,aips-bus", "simple-bus";
> > > + reg = <0x30c00000 0x400000>;
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + ranges;
> > > +
> > > + spba-bus@30c00000 {
> > > + compatible = "fsl,spba-bus", "simple-
> >
> > bus";
> >
> > > + reg = <0x30c00000 0x100000>;
> >
> > Is there an SPBA bus for every AIPS? I'm wondering why some aips do have
> > an
> > spba below and some do not.
>
> The SPBA buses are listed in the TRM, and they appear to be mostly
> covering serial devices (UART, SPI, SAI, etc), but some are excluded.
> As to why it is this way is more of a question for NXP. Check out
> chapter 2 of the TRM for the AIPS memory maps.
Thanks, I did find those AIPS parts. But the issue regarding SPBA is not so
clear. Apparently the spba compatible is checked by the SDMA driver.
Best regards,
Alexander
> adam
>
> > > + #address-cells = <1>;
> > > + #size-cells = <1>;
> > > + ranges;
> > > +
> > > + sai1: sai@30c10000 {
> > > + compatible = "fsl,imx8mp-
> >
> > sai", "fsl,imx8mq-sai";
> >
> > > + reg = <0x30c10000 0x10000>;
> > > + interrupts = <GIC_SPI 95
> >
> > IRQ_TYPE_LEVEL_HIGH>;
> >
> > > + clocks = <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI1_IPG>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_DUMMY>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3>;
> >
> > > + clock-names = "bus",
> >
> > "mclk0", "mclk1", "mclk2", "mclk3";
> >
> > > + dmas = <&sdma2 0 2 0>,
> >
> > <&sdma2 1 2 0>;
> >
> > Looking at Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml should
> > the 2nd cell value be 24? This would be true for all other sai nodes.
> >
> > > + dma-names = "rx", "tx";
> > > + status = "disabled";
> > > + };
> > > +
> > > + sai2: sai@30c20000 {
> > > + compatible = "fsl,imx8mp-
> >
> > sai", "fsl,imx8mq-sai";
> >
> > > + reg = <0x30c20000 0x10000>;
> > > + interrupts = <GIC_SPI 96
> >
> > IRQ_TYPE_LEVEL_HIGH>;
> >
> > > + clocks = <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI2_IPG>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_DUMMY>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3>;
> >
> > > + clock-names = "bus",
> >
> > "mclk0", "mclk1", "mclk2", "mclk3";
> >
> > > + dmas = <&sdma2 2 2 0>,
> >
> > <&sdma2 3 2 0>;
> >
> > > + dma-names = "rx", "tx";
> > > + status = "disabled";
> > > + };
> > > +
> > > + sai3: sai@30c30000 {
> > > + compatible = "fsl,imx8mp-
> >
> > sai", "fsl,imx8mq-sai";
> >
> > > + reg = <0x30c30000 0x10000>;
> > > + interrupts = <GIC_SPI 50
> >
> > IRQ_TYPE_LEVEL_HIGH>;
> >
> > > + clocks = <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI3_IPG>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_DUMMY>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3>;
> >
> > > + clock-names = "bus",
> >
> > "mclk0", "mclk1", "mclk2", "mclk3";
> >
> > > + dmas = <&sdma2 4 2 0>,
> >
> > <&sdma2 5 2 0>;
> >
> > > + dma-names = "rx", "tx";
> > > + status = "disabled";
> > > + };
> > > +
> > > + sai5: sai@30c50000 {
> > > + compatible = "fsl,imx8mp-
> >
> > sai", "fsl,imx8mq-sai";
> >
> > > + reg = <0x30c50000 0x10000>;
> > > + interrupts = <GIC_SPI 90
> >
> > IRQ_TYPE_LEVEL_HIGH>;
> >
> > > + clocks = <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI5_IPG>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_DUMMY>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3>;
> >
> > > + clock-names = "bus",
> >
> > "mclk0", "mclk1", "mclk2", "mclk3";
> >
> > > + dmas = <&sdma2 8 2 0>,
> >
> > <&sdma2 9 2 0>;
> >
> > > + dma-names = "rx", "tx";
> > > + status = "disabled";
> > > + };
> > > +
> > > + sai6: sai@30c60000 {
> > > + compatible = "fsl,imx8mp-
> >
> > sai", "fsl,imx8mq-sai";
> >
> > > + reg = <0x30c60000 0x10000>;
> > > + interrupts = <GIC_SPI 90
> >
> > IRQ_TYPE_LEVEL_HIGH>;
> >
> > > + clocks = <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI6_IPG>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_DUMMY>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3>;
> >
> > > + clock-names = "bus",
> >
> > "mclk0", "mclk1", "mclk2", "mclk3";
> >
> > > + dmas = <&sdma2 10 2 0>,
> >
> > <&sdma2 11 2 0>;
> >
> > > + dma-names = "rx", "tx";
> > > + status = "disabled";
> > > + };
> > > +
> > > + sai7: sai@30c80000 {
> > > + compatible = "fsl,imx8mp-
> >
> > sai", "fsl,imx8mq-sai";
> >
> > > + reg = <0x30c80000 0x10000>;
> > > + interrupts = <GIC_SPI 111
> >
> > IRQ_TYPE_LEVEL_HIGH>;
> >
> > > + clocks = <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI7_IPG>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_DUMMY>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2>,
> >
> > > + <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3>;
> >
> > > + clock-names = "bus",
> >
> > "mclk0", "mclk1", "mclk2", "mclk3";
> >
> > > + dmas = <&sdma2 12 2 0>,
> >
> > <&sdma2 13 2 0>;
> >
> > > + dma-names = "rx", "tx";
> > > + status = "disabled";
> > > + };
> > > + };
> > > +
> > > + sdma3: dma-controller@30e00000 {
> > > + compatible = "fsl,imx8mp-sdma",
> >
> > "fsl,imx8mq-sdma";
> >
> > > + reg = <0x30e00000 0x10000>;
> > > + interrupts = <GIC_SPI 34
> >
> > IRQ_TYPE_LEVEL_HIGH>;
> >
> > > + clocks = <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_AUDIO_ROOT>;
> >
> > > + clock-names = "ipg", "ahb";
> > > + #dma-cells = <3>;
> > > + fsl,sdma-ram-script-name = "imx/sdma/
> >
> > sdma-imx7d.bin";
> >
> > > + };
> > > +
> > > + sdma2: dma-controller@30e10000 {
> > > + compatible = "fsl,imx8mp-sdma",
> >
> > "fsl,imx8mq-sdma";
> >
> > > + reg = <0x30e10000 0x10000>;
> > > + interrupts = <GIC_SPI 103
> >
> > IRQ_TYPE_LEVEL_HIGH>;
> >
> > > + clocks = <&audio_blk_ctrl
> >
> > IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT>,
> >
> > > + <&clk
> >
> > IMX8MP_CLK_AUDIO_ROOT>;
> >
> > > + clock-names = "ipg", "ahb";
> > > + #dma-cells = <3>;
> > > + fsl,sdma-ram-script-name = "imx/sdma/
> >
> > sdma-imx7d.bin";
> >
> > > + };
> > > +
> > > + audio_blk_ctrl: blk-ctrl@30e20000 {
> >
> > Shouldn't the node name be 'clock-controller@30e20000' as mentioned in the
> > bindings?
> > But for the whole series:
> > Testes-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
> >
> > Best regards,
> > Alexander
> >
> > > + #clock-cells = <1>;
> > > + compatible = "fsl,imx8mp-audio-blk-
> >
> > ctrl";
> >
> > > + clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
> > > + <&clk IMX8MP_CLK_SAI1>,
> > > + <&clk IMX8MP_CLK_SAI2>,
> > > + <&clk IMX8MP_CLK_SAI3>,
> > > + <&clk IMX8MP_CLK_SAI5>,
> > > + <&clk IMX8MP_CLK_SAI6>,
> > > + <&clk IMX8MP_CLK_SAI7>;
> > > + clock-names = "ahb",
> > > + "sai1", "sai2",
> >
> > "sai3",
> >
> > > + "sai5", "sai6",
> >
> > "sai7";
> >
> > > + power-domains = <&pgc_audio>;
> > > + power-domain-names = "audio";
> > > + reg = <0x30e20000 0x10000>;
> > > + };
> > > + };
> > > +
> > >
> > > aips4: bus@32c00000 {
> > >
> > > compatible = "fsl,aips-bus", "simple-bus";
> > > reg = <0x32c00000 0x400000>;
> >
> > --
> > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
> > Amtsgericht München, HRB 105018
> > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> > http://www.tq-group.com/
--
TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
Amtsgericht München, HRB 105018
Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
http://www.tq-group.com/
