On Tue, 21 Feb 2023 17:26:52 +0000, Conor Dooley wrote: > On Tue, Feb 21, 2023 at 10:46:36AM +0800, Hal Feng wrote: >> From: Emil Renner Berthing <kernel@xxxxxxxx> >> >> Add bindings for the always-on clock and reset generator (AONCRG) on the >> JH7110 RISC-V SoC by StarFive Ltd. > >> + clocks: >> + items: >> + - description: Main Oscillator (24 MHz) >> + - description: RTC Oscillator (32.768 kHz) >> + - description: GMAC0 RMII reference >> + - description: GMAC0 RGMII RX >> + - description: STG AXI/AHB >> + - description: APB Bus >> + - description: GMAC0 GTX > > Ditto here, are some of these clocks, especially gmac0, also optional? The clock "rtc_osc" and "gmac0_rmii_refin" are optional, the other clocks are required. I will modify accordingly. Thanks. Best regards, Hal > >> + >> + clock-names: >> + items: >> + - const: osc >> + - const: rtc_osc >> + - const: gmac0_rmii_refin >> + - const: gmac0_rgmii_rxin >> + - const: stg_axiahb >> + - const: apb_bus >> + - const: gmac0_gtxclk
