Hi, This series adds PCIe RC support to the Qcom SDX55 SoC. The PCIe controller in SDX55 can act as both Root Complex and Endpoint but only one mode at a time i.e., the mode cannot be switched during runtime. This series has been tested on Thundercomm T55 board having QCA6390 WLAN chipset connected to the PCIe controller. For powering up the WLAN chipset, an out-of-tree patch has been used since we do not have a proper driver in mainline to handle the power supplies. NOTE: Even with this series, I couldn't get network connectivity using QCA6390. But that's due to ath11k regression for which I've filed a bug report: https://bugzilla.kernel.org/show_bug.cgi?id=206923 Merging strategy ---------------- PCI and binding patches through PCI tree PHY patches through PHY tree Devicetree patches through Qcom tree Thanks, Mani Manivannan Sadhasivam (11): dt-bindings: PCI: qcom: Update maintainers entry dt-bindings: PCI: qcom: Add iommu properties dt-bindings: PCI: qcom: Add SDX55 SoC dt-bindings: PCI: qcom-ep: Fix the unit address used in example ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane} ARM: dts: qcom: sdx55: Add support for PCIe RC controller ARM: dts: qcom: sdx55-t55: Enable PCIe RC support phy: qcom-qmp-pcie: Split out EP related init sequence for SDX55 phy: qcom-qmp-pcie: Add RC init sequence for SDX55 PCI: qcom: Add support for SDX55 SoC .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 +- .../devicetree/bindings/pci/qcom,pcie.yaml | 35 +++- arch/arm/boot/dts/qcom-sdx55-t55.dts | 42 +++++ .../boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 2 +- arch/arm/boot/dts/qcom-sdx55.dtsi | 154 +++++++++++++----- drivers/pci/controller/dwc/pcie-qcom.c | 4 +- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 91 +++++++++-- .../qualcomm/phy-qcom-qmp-pcs-pcie-v4_20.h | 2 + 8 files changed, 272 insertions(+), 60 deletions(-) -- 2.25.1
