Re: [PATCH v4 05/19] reset: starfive: Factor out common JH71X0 reset code

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Tue, Feb 21, 2023 at 10:46:31AM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@xxxxxxxx>
> 
> The StarFive JH7100 SoC has additional reset controllers for audio and
> video, but the registers follow the same structure. On the JH7110 the
> reset registers don't get their own memory range, but instead follow the
> clock control registers. The registers still follow the same structure
> though, so let's factor out the common code to handle all these cases.

I think you split this out compared to the previous version of t he
series, and does look as described.
Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>

Attachment: signature.asc
Description: PGP signature


[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux