Quoting zhuyinbo (2023-02-14 23:35:22)
>
> 在 2023/2/11 上午7:42, Stephen Boyd 写道:
> > Quoting Yinbo Zhu (2022-11-28 19:41:55)
> >
> >> +
> >> + mult = (val >> LOONGSON2_USB_FREQSCALE_SHIFT) &
> >> + clk_div_mask(LOONGSON2_USB_FREQSCALE_WIDTH);
> >> +
> >> + rate = parent_rate * (mult + 1);
> >> + do_div(rate, 8);
> > Why is do_div() being used?
> no expecial reason, I only want to get a result that rate divide 8.
Ok, you can use div_u64() here and simplify.
> >
>
> you meaning is to use clk_parent_data to rework
> loongson2_clk_pll_register and drop
>
> loongson2_obtain_fixed_clk_hw ?
Yes
>
> >
> >> +}
> >> +
> >> +static void __init loongson2_clocks_init(struct device_node *np)
> >> +{
> >> + struct clk_hw **hws;
> >> + struct clk_hw_onecell_data *clk_hw_data;
> >> + spinlock_t loongson2_clk_lock;
> >> +
> >> + loongson2_pll_base = of_iomap(np, 0);
> >> +
> >> + if (!loongson2_pll_base) {
> >> + pr_err("clk: unable to map loongson2 clk registers\n");
> >> + goto err;
> > return?
> sorry, I don't get it. you meaning is that remove "goto err". Instead,
> add a "return".
Yes.
> >
> >> + }
> >> +
> >> + clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, LOONGSON2_CLK_END),
> >> + GFP_KERNEL);
> >> + if (WARN_ON(!clk_hw_data))
> >> + goto err;
[...]
> >> +
> >> +err:
> >> + iounmap(loongson2_pll_base);
> >> +}
> >> +
> >> +CLK_OF_DECLARE(loongson2_clk, "loongson,ls2k-clk", loongson2_clocks_init);
> > Any reason this can't be a platform driver?
>
> For the compatible consideration of other clock controllers of
> Loongson-2 series in the future, the way of using dts can be
>
> better compatible.
>
Sorry that sentence doesn't make sense to me. The use of dts doesn't
require the use of CLK_OF_DECLARE.
