On 15.02.2023 08:03, Manivannan Sadhasivam wrote:
> Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
> to the CPU cores. But this relationship is not represented in DTS so far.
>
> So let's make cpufreq node as the clock provider and CPU nodes as the
> consumers. The clock index for each CPU node is based on the frequency
> domain index.
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> index f234159d2060..98a859ad5229 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> @@ -27,6 +27,7 @@ CPU0: cpu@0 {
> device_type = "cpu";
> compatible = "arm,cortex-a55";
> reg = <0x0 0x0>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> power-domains = <&CPU_PD0>;
> power-domain-names = "psci";
> @@ -45,6 +46,7 @@ CPU1: cpu@100 {
> device_type = "cpu";
> compatible = "arm,cortex-a55";
> reg = <0x0 0x100>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> power-domains = <&CPU_PD1>;
> power-domain-names = "psci";
> @@ -60,6 +62,7 @@ CPU2: cpu@200 {
> device_type = "cpu";
> compatible = "arm,cortex-a55";
> reg = <0x0 0x200>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> power-domains = <&CPU_PD2>;
> power-domain-names = "psci";
> @@ -75,6 +78,7 @@ CPU3: cpu@300 {
> device_type = "cpu";
> compatible = "arm,cortex-a55";
> reg = <0x0 0x300>;
> + clocks = <&cpufreq_hw 0>;
> enable-method = "psci";
> power-domains = <&CPU_PD3>;
> power-domain-names = "psci";
> @@ -1312,6 +1316,7 @@ cpufreq_hw: cpufreq@17d90000 {
> clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
> clock-names = "xo", "alternate";
> #freq-domain-cells = <1>;
> + #clock-cells = <1>;
> };
>
> gem_noc: interconnect@19100000 {
