Hi, Mark Brown <broonie@xxxxxxxxxx> 於 2023年2月15日 週三 下午9:03寫道： > > On Wed, Feb 15, 2023 at 10:00:56AM +0800, cy_huang@xxxxxxxxxxx wrote: > > > + richtek,vsel-active-high: > > + description: | > > + If property is present, use the 'VSEL1' register group for buck control. > > + Else, use the 'VSEL0' register group. This depends on external hardware > > + 'VSEL' pin connecton. > > + type: boolean > > I would expect this to be GPIO controlled rather than fixed in > the design, at least for some systems? The name suggests it's > supposed to control the polarity of a GPIO too. Sadly we don't > really have good infrastructure for fixed GPIOs AFAIK... ideally > this would be a GPIO and then if we need to hold it high then > there would be some binding we could connect to the GPIO that > says that. We don't have that though so for now a fixed property > might be OK. It's most like two phase buck controllers internally. 'Vsel' to control which buck output. Each phase has its registers (voltage/enable/mode). The common usage of 'vsel' pin is to connect the pin by SoC suspend/resume pin. This can be used to implement system low power design (like as system awake 0.6V, sleep 0.3V or sleep buck off). I haven't seen the usage to connect it directly by GPIO.
