Re: [PATCH 02/12] dt-bindings: riscv: sifive-ccache: Add 'uncached-offset' property

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Subject: Re: [PATCH 02/12] dt-bindings: riscv: sifive-ccache: Add 'uncached-offset' property
From: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
Date: Mon, 13 Feb 2023 10:23:00 +0100
Cc: devicetree@xxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx, netdev@xxxxxxxxxxxxxxx, linux-riscv@xxxxxxxxxxxxxxxxxxx, linux-stm32@xxxxxxxxxxxxxxxxxxxxxxxxxxxx, linux-arm-kernel@xxxxxxxxxxxxxxxxxxx, kernel@xxxxxxxxxxxxx
In-reply-to: <20230211031821.976408-3-cristian.ciocaltea@collabora.com>
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1

On 11/02/2023 04:18, Cristian Ciocaltea wrote:
> Add the 'uncached-offset' property to be used for specifying the
> uncached memory offset required for handling non-coherent DMA
> transactions.

Only one offset can be non-coherent? If this is for DMA, why
dma-noncoherent cannot be used?

Best regards,
Krzysztof

Follow-Ups:
- Re: [PATCH 02/12] dt-bindings: riscv: sifive-ccache: Add 'uncached-offset' property
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References:
- [PATCH 00/12] Enable networking support for StarFive JH7100 SoC
  - From: Cristian Ciocaltea
- [PATCH 02/12] dt-bindings: riscv: sifive-ccache: Add 'uncached-offset' property
  - From: Cristian Ciocaltea

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