On Tue, Feb 07, 2023 at 01:40:24PM +0200, Abel Vesa wrote: > Add SM8550 specific register layout and table configs. > > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx> > --- > > The v4 version of this patch was here: > https://lore.kernel.org/all/20230202132511.3983095-7-abel.vesa@xxxxxxxxxx/ > > Changes since v4: > * rebased on next-20230206 which includes Luca's SM6350 phy patches, > like Johan suggested > * added missing usage of com_resetm_ctrl_reg, com_c_ready_status_reg > and dp_phy_status_reg > * dropped the .dp_tx0 and .dp_tx1 for v5 offsets changes Looks good to me now. Reviewed-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
