From: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>
Add PCIe support on the Verdin iMX8M Plus.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>
---
This has successfully been tested with Lucas' imx8mp-hsio-blk-ctrl high
performance PLL clock exposure patch set which meanwhile has landet in
-next. Thanks!
Changes in v2:
- Removed clocks which thanks to Lucas are now in the SoC dtsi.
- Follow recent change to not include dahlia dtsi requiring PCIe nodes
in dev board dts as well.
.../boot/dts/freescale/imx8mp-verdin-dahlia.dtsi | 9 ++++++++-
.../boot/dts/freescale/imx8mp-verdin-dev.dtsi | 9 ++++++++-
arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 15 ++++++++++++++-
3 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
index 80db1ad7c230..56b0e4b865c9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
@@ -67,7 +67,14 @@ &i2c4 {
/* TODO: Audio Codec */
};
-/* TODO: Verdin PCIE_1 */
+/* Verdin PCIE_1 */
+&pcie {
+ status = "okay";
+};
+
+&pcie_phy {
+ status = "okay";
+};
/* Verdin PWM_1 */
&pwm1 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
index 361426c0da0a..096a6f2300f9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi
@@ -91,7 +91,14 @@ &i2c4 {
/* TODO: Audio Codec */
};
-/* TODO: Verdin PCIE_1 */
+/* Verdin PCIE_1 */
+&pcie {
+ status = "okay";
+};
+
+&pcie_phy {
+ status = "okay";
+};
/* Verdin PWM_1 */
&pwm1 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index 6a1890a4b5d8..f0e5838665b2 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -749,7 +749,20 @@ eeprom_carrier_board: eeprom@57 {
};
};
-/* TODO: Verdin PCIE_1 */
+/* Verdin PCIE_1 */
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ /* PCIE_1_RESET# (SODIMM 244) */
+ reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
+};
+
+&pcie_phy {
+ clocks = <&hsio_blk_ctrl>;
+ clock-names = "ref";
+ fsl,clkreq-unsupported;
+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
+};
/* Verdin PWM_1 */
&pwm1 {
--
2.36.1
