On Tue, 31 Jan 2023 06:17:17 +0000, Conor Dooley wrote: > On 31 January 2023 02:00:26 GMT, Hal Feng <hal.feng@xxxxxxxxxxxxxxxx> wrote: >>On Tue, 20 Dec 2022 09:12:46 +0800, Hal Feng wrote: >>> From: Emil Renner Berthing <kernel@xxxxxxxx> >>> >>> Add initial device tree for the JH7110 RISC-V SoC by StarFive >>> Technology Ltd. >>> >>> Signed-off-by: Emil Renner Berthing <kernel@xxxxxxxx> >>> Co-developed-by: Jianlong Huang <jianlong.huang@xxxxxxxxxxxxxxxx> >>> Signed-off-by: Jianlong Huang <jianlong.huang@xxxxxxxxxxxxxxxx> >>> Co-developed-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx> >>> Signed-off-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx> >>> --- >>> arch/riscv/boot/dts/starfive/jh7110.dtsi | 411 +++++++++++++++++++++++ >>> 1 file changed, 411 insertions(+) >>> create mode 100644 arch/riscv/boot/dts/starfive/jh7110.dtsi >> >>I wanna add i2c nodes (i2c0-6) in the next version, so someone else >>can use them when they submit i2c driver patches. > > All of the other series depend on this one for enablement, > so unless the binding for i2c is already upstream I'd advise keeping it separate. The i2c IP of JH7110 is from Synopsys and the same as the i2c IP in JH7100. The binding and driver for i2c are already upstream. It works as long as we add the i2c nodes and configure pins for i2c in device tree. It will simplify the dependency if we do that. By the way, I am checking the ISA of U74-MC on JH7110 with someone else. I will reply you today. Best regards, Hal
