On 2023/1/26 10:33, Stephen Boyd wrote:
> Quoting Xingyu Wu (2023-01-19 18:44:37)
>> diff --git a/drivers/clk/starfive/clk-starfive-jh7110-stg.c b/drivers/clk/starfive/clk-starfive-jh7110-stg.c
>> new file mode 100644
>> index 000000000000..c2740f44e796
>> --- /dev/null
>> +++ b/drivers/clk/starfive/clk-starfive-jh7110-stg.c
>> @@ -0,0 +1,180 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * StarFive JH7110 System-Top-Group Clock Driver
>> + *
>> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
>> + */
>> +
>> +#include <linux/clk.h>
>
> Is this include used? If not, please remove.
Will drop in next patch.
>
>> +#include <linux/clk-provider.h>
>> +#include <linux/io.h>
>> +#include <linux/of.h>
>> +#include <linux/platform_device.h>
>> +
>> +#include <dt-bindings/clock/starfive,jh7110-crg.h>
>> +
>> +#include "clk-starfive-jh71x0.h"
>> +
> [...]
>> +static int jh7110_stgcrg_probe(struct platform_device *pdev)
>> +{
>> + struct jh71x0_clk_priv *priv;
>> + unsigned int idx;
>> + int ret;
>> +
>> + priv = devm_kzalloc(&pdev->dev,
>> + struct_size(priv, reg, JH7110_STGCLK_END),
>> + GFP_KERNEL);
>> + if (!priv)
>> + return -ENOMEM;
>> +
>> + spin_lock_init(&priv->rmw_lock);
>> + priv->dev = &pdev->dev;
>> + priv->base = devm_platform_ioremap_resource(pdev, 0);
>> + if (IS_ERR(priv->base))
>> + return PTR_ERR(priv->base);
>> +
>> + dev_set_drvdata(priv->dev, priv->base);
>> +
>> + for (idx = 0; idx < JH7110_STGCLK_END; idx++) {
>> + u32 max = jh7110_stgclk_data[idx].max;
>> + struct clk_parent_data parents[4] = {};
>> + struct clk_init_data init = {
>> + .name = jh7110_stgclk_data[idx].name,
>> + .ops = starfive_jh71x0_clk_ops(max),
>> + .parent_data = parents,
>> + .num_parents =
>> + ((max & JH71X0_CLK_MUX_MASK) >> JH71X0_CLK_MUX_SHIFT) + 1,
>> + .flags = jh7110_stgclk_data[idx].flags,
>> + };
>> + struct jh71x0_clk *clk = &priv->reg[idx];
>> + unsigned int i;
>> +
>> + for (i = 0; i < init.num_parents; i++) {
>> + unsigned int pidx = jh7110_stgclk_data[idx].parents[i];
>> +
>> + if (pidx < JH7110_STGCLK_END)
>> + parents[i].hw = &priv->reg[pidx].hw;
>> + else if (pidx == JH7110_STGCLK_OSC)
>> + parents[i].fw_name = "osc";
>> + else if (pidx == JH7110_STGCLK_HIFI4_CORE)
>> + parents[i].fw_name = "hifi4_core";
>> + else if (pidx == JH7110_STGCLK_STG_AXIAHB)
>> + parents[i].fw_name = "stg_axiahb";
>> + else if (pidx == JH7110_STGCLK_USB_125M)
>> + parents[i].fw_name = "usb_125m";
>> + else if (pidx == JH7110_STGCLK_CPU_BUS)
>> + parents[i].fw_name = "cpu_bus";
>> + else if (pidx == JH7110_STGCLK_HIFI4_AXI)
>> + parents[i].fw_name = "hifi4_axi";
>> + else if (pidx == JH7110_STGCLK_NOCSTG_BUS)
>> + parents[i].fw_name = "nocstg_bus";
>> + else if (pidx == JH7110_STGCLK_APB_BUS)
>> + parents[i].fw_name = "apb_bus";
>
> Can this be an array lookup instead of a pile of conditions?
>
> if (pidx < JH7110_STGCLK_END)
> ...
> else
> parents[i].fw_name = fw_table[pidx - JH7110_STGCLK_END];
>
> Or even better, don't use strings at all and just make the 'pidx' number
> (possibly minus the end constant) be the 'clocks' property index that
> you want.
It seen to be a good way that there uses an array.
Based on the another way, can I use the 'pidx' number to get the 'clock-names' property
to be the parent clock name?
>
>> + }
>> +
>> + clk->hw.init = &init;
>> + clk->idx = idx;
>> + clk->max_div = max & JH71X0_CLK_DIV_MASK;
>> +
>> + ret = devm_clk_hw_register(&pdev->dev, &clk->hw);
>> + if (ret)
>> + return ret;
>> + }
>> +
>> + ret = devm_of_clk_add_hw_provider(&pdev->dev, jh7110_stgclk_get, priv);
>> + if (ret)
>> + return ret;
>> +
>> + return jh7110_reset_controller_register(priv, "reset-stg", 2);
>
> Is this also devm-ified?
No, it need to be freed actively. I will advise Hal Feng this.
Best regards,
Xingyu Wu
