Dne četrtek, 26. januar 2023 ob 07:34:19 CET je Samuel Holland napisal(a):
> The Allwinner D1 family of SoCs contain a PPU power domain controller
> separate from the PRCM. It can power down the video engine and DSP, and
> it contains special logic for hardware-assisted CPU idle.
>
> Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx>
Acked-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx>
Best regards,
Jernej
> ---
>
> Changes in v2:
> - Include a patch adding the device tree node
>
> arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index
> 3723612b1fd8..6fadcee7800f 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -799,6 +799,14 @@ tcon_tv0_out_tcon_top_hdmi: endpoint {
> };
> };
>
> + ppu: power-controller@7001000 {
> + compatible = "allwinner,sun20i-d1-ppu";
> + reg = <0x7001000 0x1000>;
> + clocks = <&r_ccu CLK_BUS_R_PPU>;
> + resets = <&r_ccu RST_BUS_R_PPU>;
> + #power-domain-cells = <1>;
> + };
> +
> r_ccu: clock-controller@7010000 {
> compatible = "allwinner,sun20i-d1-r-ccu";
> reg = <0x7010000 0x400>;
