On Tue, Jan 24, 2023, at 11:30, Alexander Stein wrote:
> Am Freitag, 20. Januar 2023, 15:00:35 CET schrieb Arnd Bergmann:
>> On Fri, Jan 20, 2023, at 13:43, Alexander Stein wrote:
>
> Thanks for the explanation, although I'm still lacking deeper knowledge how to
> configure PCIe properly.
> I tried adding the following line in the 'ranges' property:
>> <0xc2000000 0x0 0x20000000 0x40 0x20000000 0x0 0x20000000>, /* prefetchable
> memory */
> which was taken from the old example in Documentation/devicetree/bindings/pci/
> layerscape-pci.txt, removed in Commit a3b18f5f1d42e ("dt-bindings: pci:
> layerscape-pci: define AER/PME interrupts", 2022-03-11).
> But I couldn't detect any difference, maybe it's just due to my PCIe devices I
> have available.
Right, you need to have a device that actually wants to use prefetchable
memory, whichi is something that 'lspci -v' tells you. I'm also not
sure how this particular controller needs to be configured. Some
drivers read the 'ranges' properties and program the windows in
the PCI controller registers, while others expect the firmware to
have set up the hardware windows in the way they are described in DT.
>> It might be worthwhile to check if your system works
>> correctly with ARM_LPAE=y, VMSPLIT_2G=y and HIGHMEM=n,
>> which should be the best configuration for your system
>> anyway and will keep working after highmem gets removed.
>
> Thanks for that hint. Having this setting the board seems to still run like it
> should.
Ok, good.
Arnd
