From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
On Wed, 11 Jan 2023 12:41:04 +0000, Conor Dooley wrote:
> Hey All,
>
> The board has 32 GB of DDR but the DT I have access to only has a small
> bit of that mapped. I tried accessing more DDR, but it was not possible
> with the FPGA design as things stand. I'd rather have the devicetree
> match what the vendor is shipping, so left the design/DDR as-was.
>
> [...]
Applied to riscv-dt-for-next, thanks!
[1/3] dt-bindings: vendor-prefixes: Add entry for Aldec
https://git.kernel.org/conor/c/f6beee9118c3
[2/3] dt-bindings: riscv: microchip: document the Aldec TySoM
https://git.kernel.org/conor/c/ea913d8865fe
[3/3] riscv: dts: microchip: add the Aldec TySoM's devicetree
https://git.kernel.org/conor/c/4f7d64156292
Removed the PCIe that I forgot to remove before sending in the process...
Thanks,
Conor.
