SM8150 has (at least) two GPU speed bins. With the support added on the
driver side, wire up bin detection in the DTS to restrict lower-quality
SKUs from running at frequencies they were not validated at.
Tested-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx> # On Sony Xperia 5 (speed bin 0x3)
Reviewed-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index e3059f9b98de..1c7ee0cd816d 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -945,6 +945,17 @@ ethernet: ethernet@20000 {
status = "disabled";
};
+ qfprom: efuse@784000 {
+ compatible = "qcom,sm8150-qfprom", "qcom,qfprom";
+ reg = <0 0x00784000 0 0x8ff>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ gpu_speed_bin: gpu_speed_bin@133 {
+ reg = <0x133 0x1>;
+ bits = <5 3>;
+ };
+ };
qupv3_id_0: geniqup@8c0000 {
compatible = "qcom,geni-se-qup";
@@ -2145,44 +2156,52 @@ gpu: gpu@2c00000 {
qcom,gmu = <&gmu>;
+ nvmem-cells = <&gpu_speed_bin>;
+ nvmem-cell-names = "speed_bin";
+
status = "disabled";
zap-shader {
memory-region = <&gpu_mem>;
};
- /* note: downstream checks gpu binning for 675 Mhz */
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
opp-675000000 {
opp-hz = /bits/ 64 <675000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+ opp-supported-hw = <0x2>;
};
opp-585000000 {
opp-hz = /bits/ 64 <585000000>;
opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+ opp-supported-hw = <0x3>;
};
opp-499200000 {
opp-hz = /bits/ 64 <499200000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
+ opp-supported-hw = <0x3>;
};
opp-427000000 {
opp-hz = /bits/ 64 <427000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ opp-supported-hw = <0x3>;
};
opp-345000000 {
opp-hz = /bits/ 64 <345000000>;
opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ opp-supported-hw = <0x3>;
};
opp-257000000 {
opp-hz = /bits/ 64 <257000000>;
opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ opp-supported-hw = <0x3>;
};
};
};
--
2.39.1
