From: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
The SA8295P ADP has a Maxim max20411 step-down converter on i2c4.
Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Signed-off-by: Bjorn Andersson <quic_bjorande@xxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 41 ++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index 80cb18d9e481..cdb296569d46 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -476,6 +476,31 @@ &pcie4_phy {
status = "okay";
};
+&qup1 {
+ status = "okay";
+};
+
+&qup1_i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&qup1_i2c4_state>;
+
+ status = "okay";
+
+ vdd_gfx: regulator@39 {
+ compatible = "maxim,max20411";
+ reg = <0x39>;
+
+ regulator-name = "vdd_gfx";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <968750>;
+
+ enable-gpios = <&pmm8540a_gpios 2 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_gfx_enable_state>;
+ };
+};
+
&qup2 {
status = "okay";
};
@@ -636,6 +661,14 @@ &xo_board_clk {
/* PINCTRL */
+&pmm8540a_gpios {
+ vdd_gfx_enable_state: vdd-gfx-enable-state {
+ pins = "gpio2";
+ function = "normal";
+ output-enable;
+ };
+};
+
&tlmm {
pcie2a_default: pcie2a-default-state {
clkreq-n-pins {
@@ -728,4 +761,12 @@ wake-n-pins {
bias-pull-up;
};
};
+
+ qup1_i2c4_state: qup1-i2c4-state {
+ pins = "gpio0", "gpio1";
+ function = "qup12";
+
+ drive-strength = <2>;
+ bias-pull-up;
+ };
};
--
2.37.3
