Re: [PATCH v3 3/8] phy: qcom-qmp: pcs: Add v6.20 register offsets

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On 18/01/2023 02:53, Abel Vesa wrote:
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new PCS offsets in a dedicated header file.

Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
---
  drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h | 18 ++++++++++++++++++
  drivers/phy/qualcomm/phy-qcom-qmp.h           |  2 ++
  2 files changed, 20 insertions(+)
  create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h

I can not verify register offsets, but generally looks good. Thus:

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>

--
With best wishes
Dmitry




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