On MSM8996 two CPU clusters are interconnected using the Core Bus Fabric (CBF). In order for the CPU clusters to function properly, it should be clocked following the core's frequencies to provide adequate bandwidth. On the other hand the CBF's clock rate can be used by other drivers (e.g. by the pending SPDM driver to provide input on the CPU performance). Thus register CBF as a clock (required for CPU to boot) and add a tiny interconnect layer on top of it to let cpufreq/opp scale the CBF clock. Dependencies: [1] [1] https://lore.kernel.org/linux-arm-msm/20230111191453.2509468-1-dmitry.baryshkov@xxxxxxxxxx/ - Relicensed schema to GPL-2.0 + BSD-2-Clause (Krzysztof) - Changed clock driver to use parent_hws (Konrad) - Fixed indentation in CBF clock driver (Konrad) - Changed MODULE_LICENSE of CBF clock driver to GPL from GPL-v2 - Switched CBF to use RPM_SMD_XO_CLK_SRC as one of the parents - Enabled RPM_SMD_XO_CLK_SRC on msm8996 platform and switch to it from RPM_SMD_BB_CLK1 clock Dmitry Baryshkov (7): dt-bindings: clock: qcom,msm8996-cbf: Describe the MSM8996 CBF clock controller clk: qcom: add msm8996 Core Bus Framework (CBF) support clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreq clk: qcom: smd-rpm: provide RPM_SMD_XO_CLK_SRC on MSM8996 platform arm64: qcom: dts: msm8996 switch from RPM_SMD_BB_CLK1 to RPM_SMD_XO_CLK_SRC arm64: dts: qcom: msm8996: add CBF device entry arm64: dts: qcom: msm8996: scale CBF clock according to the CPUfreq .../bindings/clock/qcom,msm8996-cbf.yaml | 53 ++ arch/arm64/boot/dts/qcom/msm8996.dtsi | 71 ++- drivers/clk/qcom/Makefile | 2 +- drivers/clk/qcom/clk-cbf-8996.c | 456 ++++++++++++++++++ drivers/clk/qcom/clk-smd-rpm.c | 2 + 5 files changed, 576 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml create mode 100644 drivers/clk/qcom/clk-cbf-8996.c -- 2.39.0
