Add documentation for the MDIO bus multiplexer found on the Amlogic GXL SoC family Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx> --- .../bindings/net/amlogic,gxl-mdio-mux.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml diff --git a/Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml b/Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml new file mode 100644 index 000000000000..d21bce695fa9 --- /dev/null +++ b/Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic GXL MDIO bus multiplexer + +maintainers: + - Jerome Brunet <jbrunet@xxxxxxxxxxxx> + +description: + This is a special case of a MDIO bus multiplexer. It allows to choose between + the internal mdio bus leading to the embedded 10/100 PHY or the external + MDIO bus on the Amlogic GXL SoC family. + +allOf: + - $ref: mdio-mux.yaml# + +properties: + compatible: + const: amlogic,gxl-mdio-mux + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ref + +required: + - compatible + - reg + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + eth_phy_mux: mdio@558 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "amlogic,gxl-mdio-mux"; + clocks = <&refclk>; + clock-names = "ref"; + reg = <0x558 0xc>; + mdio-parent-bus = <&mdio0>; + + external_mdio: mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + }; + + internal_mdio: mdio@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; + }; + }; -- 2.39.0
