For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
hardware differences in power domains, clocks and subsystem counts,
which should be determined by compatible names.
Signed-off-by: Moudy Ho <moudy.ho@xxxxxxxxxxxx>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 84de12709323..27d2631d43d3 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -34,6 +34,8 @@ properties:
- mediatek,mt8188-vdosys0
- mediatek,mt8192-mmsys
- mediatek,mt8365-mmsys
+ - mediatek,mt8195-vppsys0
+ - mediatek,mt8195-vppsys1
- const: syscon
- description: vdosys0 and vdosys1 are 2 display HW pipelines,
--
2.18.0
