Re: [PATCH v8 3/3] ARM: dts: add rk3288 power-domain node

[Caesar Wang <caesar.wang@xxxxxxxxxxxxxx>]

在 2014年11月06日 16:45, Kever Yang 写道:
> Hi Caesar,
>
> On 11/06/2014 02:22 PM, Caesar Wang wrote:
> > Signed-off-by: Jack Dai <jack.dai@xxxxxxxxxxxxxx>
> > Signed-off-by: jinkun.hong <jinkun.hong@xxxxxxxxxxxxxx>
> > Signed-off-by: Caesar Wang <caesar.wang@xxxxxxxxxxxxxx>
> pls detail the reason why you need to add all the clocks into 
> power-controller node.

OK, I will fix in next patch v9 if there is no other problems in 1-2 days.

> > ---
> >
> > Changes in v8:
> >      - DTS go back to v2
> >
> > Changes in v7: None
> > Changes in v6: None
> > Changes in v5: None
> > Changes in v4: None
> > Changes in v3:
> >      - Decomposition power-controller, changed to multiple controller
> >      (gpu-power-controller, hevc-power-controller)
> >
> > Changes in v2:
> >      - make pd_vio clocks all one entry per line and alphabetize.
> >      - power: power-controller move back to pinctrl: pinctrl.
> >
> >   arch/arm/boot/dts/rk3288.dtsi | 66 
> > +++++++++++++++++++++++++++++++++++++++++++
> >   1 file changed, 66 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/rk3288.dtsi 
> > b/arch/arm/boot/dts/rk3288.dtsi
> > index cb18bb4..9cd269a 100644
> > --- a/arch/arm/boot/dts/rk3288.dtsi
> > +++ b/arch/arm/boot/dts/rk3288.dtsi
> > @@ -989,4 +989,70 @@
> >               };
> >           };
> >       };
> > +
> > +    power: power-controller {
> > +        compatible = "rockchip,rk3288-power-controller";
> > +        #power-domain-cells = <1>;
> > +        rockchip,pmu = <&pmu>;
> > +        #address-cells = <1>;
> > +        #size-cells = <0>;
> > +
> > +        pd_gpu {
> > +            reg = <RK3288_PD_GPU>;
> > +            clocks = <&cru ACLK_GPU>;
> > +        };
> > +
> > +        pd_hevc {
> > +            reg = <RK3288_PD_HEVC>;
> > +            clocks = <&cru ACLK_HEVC>,
> > +                 <&cru SCLK_HEVC_CABAC>,
> > +                 <&cru SCLK_HEVC_CORE>,
> > +                 <&cru HCLK_HEVC>;
> > +        };
> > +
> > +        pd_vio {
> > +            reg = <RK3288_PD_VIO>;
> > +            clocks = <&cru ACLK_IEP>,
> > +                 <&cru ACLK_ISP>,
> > +                 <&cru ACLK_RGA_NIU>,
> > +                 <&cru ACLK_RGA>,
> > +                 <&cru ACLK_VIO0_NIU>,
> > +                 <&cru ACLK_VIO1_NIU>,
> > +                 <&cru ACLK_VIP>,
> > +                 <&cru ACLK_VOP0>,
> > +                 <&cru ACLK_VOP1>,
> > +                 <&cru DCLK_VOP0>,
> > +                 <&cru DCLK_VOP1>,
> > +                 <&cru HCLK_IEP>,
> > +                 <&cru HCLK_ISP>,
> > +                 <&cru HCLK_RGA>,
> > +                 <&cru HCLK_VIO_AHB_ARBI>,
> > +                 <&cru HCLK_VIO_NIU>,
> > +                 <&cru HCLK_VIO2_H2P>,
> > +                 <&cru HCLK_VIP>,
> > +                 <&cru HCLK_VOP0>,
> > +                 <&cru HCLK_VOP1>,
> > +                 <&cru PCLK_EDP_CTRL>,
> > +                 <&cru PCLK_HDMI_CTRL>,
> > +                 <&cru PCLK_LVDS_PHY>,
> > +                 <&cru PCLK_MIPI_CSI>,
> > +                 <&cru PCLK_MIPI_DSI0>,
> > +                 <&cru PCLK_MIPI_DSI1>,
> > +                 <&cru PCLK_VIO2_H2P>,
> > +                 <&cru SCLK_EDP_24M>,
> > +                 <&cru SCLK_EDP>,
> > +                 <&cru SCLK_HDMI_CEC>,
> > +                 <&cru SCLK_HDMI_HDCP>,
> > +                 <&cru SCLK_ISP_JPE>,
> > +                 <&cru SCLK_ISP>,
> > +                 <&cru SCLK_RGA>;
> > +        };
> > +
> > +        pd_video {
> > +            reg = <RK3288_PD_VIDEO>;
> > +            /* FIXME: add clocks */
> remove the 'FIXME'.

Fixed.

> > +            clocks = <&cru ACLK_VCODEC>,
> > +                 <&cru HCLK_VCODEC>;
> > +        };
> > +    };
> >   };

--
Best regards,
Caesar


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