> + motorcomm,rx-delay-basic:
> + description: |
> + Tristate, setup the basic RGMII RX Clock delay of PHY.
> + This basic delay is fixed at 2ns (1000Mbps) or 8ns (100Mbps、10Mbps).
> + This basic delay usually auto set by hardware according to the voltage
> + of RXD0 pin (low = 0, turn off; high = 1, turn on).
> + If not exist, this delay is controlled by hardware.
> + 0: turn off; 1: turn on.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]
Why is this needed? When the MAC driver connects to the PHY, it passes
phy-mode. For RGMII, this is one of:
linux/phy.h: PHY_INTERFACE_MODE_RGMII,
linux/phy.h: PHY_INTERFACE_MODE_RGMII_ID,
linux/phy.h: PHY_INTERFACE_MODE_RGMII_RXID,
linux/phy.h: PHY_INTERFACE_MODE_RGMII_TXID,
This tells you if you need to add a delay for the RX clock line, the
TX clock line, or both. That is all you need to know for basic RGMII
delays.
> + motorcomm,rx-delay-additional-ps:
ethernet-phy.yaml defines rx-internal-delay-ps. Please use that.
> + description: |
> + Setup the additional RGMII RX Clock delay of PHY defined in pico seconds.
> + RGMII RX Clock Delay = rx-delay-basic + rx-delay-additional-ps.
> + enum:
> + - 0
> + - 150
> + - 300
> + - 450
> + - 600
> + - 750
> + - 900
> + - 1050
> + - 1200
> + - 1350
> + - 1500
> + - 1650
> + - 1800
> + - 1950
> + - 2100
> + - 2250
Is this property mandatory? If not, please document what value is used
if it is not present.
> +
> + motorcomm,tx-delay-ge-ps:
tx-internal-delay-ps
And please define the default.
> + motorcomm,tx-delay-fe-ps:
So you can only set the TX delay? What is RX delay set to? Same as 1G?
I would suggest you call this motorcomm,tx-internal-delay-fe-ps, so
that it is similar to the standard tx-internal-delay-ps.
> + description: |
> + Setup PHY's RGMII TX Clock delay defined in pico seconds when the speed
> + is 100Mbps or 10Mbps.
> + enum:
> + - 0
> + - 150
> + - 300
> + - 450
> + - 600
> + - 750
> + - 900
> + - 1050
> + - 1200
> + - 1350
> + - 1500
> + - 1650
> + - 1800
> + - 1950
> + - 2100
> + - 2250
> +
> + motorcomm,keep-pll-enabled:
> + description: |
> + If set, keep the PLL enabled even if there is no link. Useful if you
> + want to use the clock output without an ethernet link.
> + type: boolean
> +
> + motorcomm,auto-sleep-disabled:
> + description: |
> + If set, PHY will not enter sleep mode and close AFE after unplug cable
> + for a timer.
> + type: boolean
These two i can see being useful. But everything afterwards seems like
just copy/paste from vendor SDK for things which the hardware can do,
but probably nobody ever uses. Do you have a board using any of the
following properties?
> +
> + motorcomm,tx-clk-adj-enabled:
> + description: |
> + Useful if you want to use tx-clk-xxxx-inverted to adj the delay of tx clk.
> + type: boolean
> +
> + motorcomm,tx-clk-10-inverted:
> + description: |
> + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
> + Transmit PHY Clock delay train configuration when speed is 10Mbps.
> + type: boolean
> +
> + motorcomm,tx-clk-100-inverted:
> + description: |
> + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
> + Transmit PHY Clock delay train configuration when speed is 100Mbps.
> + type: boolean
> +
> + motorcomm,tx-clk-1000-inverted:
> + description: |
> + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
> + Transmit PHY Clock delay train configuration when speed is 1000Mbps.
> + type: boolean
> +
> + motorcomm,sds-tx-amplitude:
> + description: |
> + Setup the tx driver amplitude control of SerDes. Higher amplitude is
> + helpful for long distance.
> + 0: low; 1: middle; 2: high.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1, 2]
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + ethernet {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethernet-phy@5 {
> + reg = <5>;
PHYs are on MDIO busses, so i would expect to see an MDIO bus here,
not Ethernet.
Andrew
