Re: [PATCH v6 4/8] arm64: dts: Add DT node for the VIPNano-QI on the A311D

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On 1/2/23 10:53, Neil Armstrong wrote:
On 02/12/2022 12:52, Tomeu Vizoso wrote:
This "NPU" is very similar to the Vivante GPUs and Etnaviv works well
with it with just a few small changes.

v2: Add reference to RESET_NNA (Neil)
v3: Fix indentation (Neil)

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@xxxxxxxxxxxxx>
Reviewed-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
---
  arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi     | 11 +++++++++++
  .../boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts |  4 ++++
  2 files changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 45947c1031c4..61c8461df614 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -11,6 +11,7 @@
  #include <dt-bindings/interrupt-controller/arm-gic.h>
  #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
  #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/power/meson-g12a-power.h>
  / {
      interrupt-parent = <&gic>;
@@ -2484,4 +2485,14 @@ xtal: xtal-clk {
          #clock-cells = <0>;
      };
+    npu: npu@ff100000 {
+        compatible = "vivante,gc";
+        reg = <0x0 0xff100000 0x0 0x20000>;
+        interrupts = <0 147 4>;
+        clocks = <&clkc CLKID_NNA_CORE_CLK>,
+             <&clkc CLKID_NNA_AXI_CLK>;
+        clock-names = "core", "bus";
+        resets = <&reset RESET_NNA>;
+        power-domains = <&pwrc PWRC_G12A_NNA_ID>;

A status = "disable" is missing here.

+    };
  };
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
index 124a80901084..73f3d87dcefd 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts
@@ -15,6 +15,10 @@ / {
      compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
  };
+&npu {
+    status = "okay";

Tomeu, I think until the user-space stack is clean this should be removed
and left disabled.

Sounds good to me, we can easily carry a patch in Mesa CI in the meantime.

I can fix this while applying if you want,

I would appreciate it, thanks!

Tomeu

Neil

+};
+
  /*
   * The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential
   * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between




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