On Wed, Dec 28, 2022 at 4:31 PM Miles Chen <miles.chen@xxxxxxxxxxxx> wrote: > > Hi, > > > These two are both mtk_composite arrays, one dependent on another, but > > that's something that the clock framework is supposed to sort out and > > anyway registering them separately isn't going to ease the framework's > > job in checking dependencies. > > > > Put the contents of top_adj_divs in top_muxes to join them together > > and register them in one shot. > > > > In mt8192, we can join top_adj_divs and top_muxes: > > mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, &mt8192_clk_lock, > top_clk_data); > mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt8192_clk_lock, > top_clk_data); > > However, there are other top_adj_divs[] and top_muxes[] in different types so > we cannot join them. > > For example: > in drivers/clk/mediatek/clk-mt8167.c:mtk_topckgen_init(): > > mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, > &mt8167_clk_lock, clk_data); > mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), > base, &mt8167_clk_lock, clk_data); > > So we can join top_adj_divs and top_muxes in some platforms, but we > cannot join top_adj_divs and top_muxes in some other platforms. > > I'm afraid that this will confuses people. I think the confusion comes from the macro names. It's not exactly clear that DIV_GATE is for composite clocks, while DIV_ADJ is for divider clocks. Doubly so for the mux related types. Either way, using the wrong macro or the wrong type will cause the compiler to complain, so I think it's something we can live with. If it's still not working out, maybe we should rethink the naming. ChenYu
