On Qualcomm QCS404 platform the PCIe2 PHY provides PIPE clock to the gcc (Global Clock Controller). Register the PHY as clock provider. Changes since v2: - Removed extra empty line in the schema (Krzysztof), - Dropped dtsi patch accepted by Bjorn. Changes since v1: - Dropped 'phandle to' from supply descriptions in schema (Krzysztof), - Reordered clock-related property definitions in schema as suggested by Krzysztof, - Dropped extra empty line at the end of the schema (reported by Krzysztof). Dmitry Baryshkov (2): dt-bindings: phy: qcom,pcie2-phy: convert to YAML format phy: qualcomm: pcie2: register as clock provider .../bindings/phy/qcom,pcie2-phy.yaml | 86 +++++++++++++++++++ .../bindings/phy/qcom-pcie2-phy.txt | 42 --------- drivers/phy/qualcomm/phy-qcom-pcie2.c | 6 +- 3 files changed, 91 insertions(+), 43 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml delete mode 100644 Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt -- 2.39.0
