On 28.12.2022 14:32, Dmitry Baryshkov wrote:
> Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
> adding/removing entries to/from parent_data/names/hws easy and errorproof.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
Konrad
> drivers/clk/qcom/gcc-sdx55.c | 52 ++++++++++++++++++------------------
> 1 file changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/clk/qcom/gcc-sdx55.c b/drivers/clk/qcom/gcc-sdx55.c
> index 4fca19006a77..758b295e1bfa 100644
> --- a/drivers/clk/qcom/gcc-sdx55.c
> +++ b/drivers/clk/qcom/gcc-sdx55.c
> @@ -232,7 +232,7 @@ static struct clk_rcg2 gcc_blsp1_qup1_i2c_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_qup1_i2c_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -258,7 +258,7 @@ static struct clk_rcg2 gcc_blsp1_qup1_spi_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_qup1_spi_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -272,7 +272,7 @@ static struct clk_rcg2 gcc_blsp1_qup2_i2c_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_qup2_i2c_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -286,7 +286,7 @@ static struct clk_rcg2 gcc_blsp1_qup2_spi_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_qup2_spi_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -300,7 +300,7 @@ static struct clk_rcg2 gcc_blsp1_qup3_i2c_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_qup3_i2c_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -314,7 +314,7 @@ static struct clk_rcg2 gcc_blsp1_qup3_spi_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_qup3_spi_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -328,7 +328,7 @@ static struct clk_rcg2 gcc_blsp1_qup4_i2c_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_qup4_i2c_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -342,7 +342,7 @@ static struct clk_rcg2 gcc_blsp1_qup4_spi_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_qup4_spi_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -386,7 +386,7 @@ static struct clk_rcg2 gcc_blsp1_uart1_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_uart1_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -400,7 +400,7 @@ static struct clk_rcg2 gcc_blsp1_uart2_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_uart2_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -414,7 +414,7 @@ static struct clk_rcg2 gcc_blsp1_uart3_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_uart3_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -428,7 +428,7 @@ static struct clk_rcg2 gcc_blsp1_uart4_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_blsp1_uart4_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -450,7 +450,7 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_cpuss_ahb_clk_src",
> .parent_data = gcc_parents_0_ao,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0_ao),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -469,7 +469,7 @@ static struct clk_rcg2 gcc_cpuss_rbcpr_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_cpuss_rbcpr_clk_src",
> .parent_data = gcc_parents_0_ao,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0_ao),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -493,7 +493,7 @@ static struct clk_rcg2 gcc_emac_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_emac_clk_src",
> .parent_data = gcc_parents_5,
> - .num_parents = 5,
> + .num_parents = ARRAY_SIZE(gcc_parents_5),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -514,7 +514,7 @@ static struct clk_rcg2 gcc_emac_ptp_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_emac_ptp_clk_src",
> .parent_data = gcc_parents_2,
> - .num_parents = 6,
> + .num_parents = ARRAY_SIZE(gcc_parents_2),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -537,7 +537,7 @@ static struct clk_rcg2 gcc_gp1_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_gp1_clk_src",
> .parent_data = gcc_parents_3,
> - .num_parents = 5,
> + .num_parents = ARRAY_SIZE(gcc_parents_3),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -551,7 +551,7 @@ static struct clk_rcg2 gcc_gp2_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_gp2_clk_src",
> .parent_data = gcc_parents_3,
> - .num_parents = 5,
> + .num_parents = ARRAY_SIZE(gcc_parents_3),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -565,7 +565,7 @@ static struct clk_rcg2 gcc_gp3_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_gp3_clk_src",
> .parent_data = gcc_parents_3,
> - .num_parents = 5,
> + .num_parents = ARRAY_SIZE(gcc_parents_3),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -579,7 +579,7 @@ static struct clk_rcg2 gcc_pcie_aux_phy_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_pcie_aux_phy_clk_src",
> .parent_data = gcc_parents_4,
> - .num_parents = 3,
> + .num_parents = ARRAY_SIZE(gcc_parents_4),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -598,7 +598,7 @@ static struct clk_rcg2 gcc_pcie_rchng_phy_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_pcie_rchng_phy_clk_src",
> .parent_data = gcc_parents_3,
> - .num_parents = 5,
> + .num_parents = ARRAY_SIZE(gcc_parents_3),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -619,7 +619,7 @@ static struct clk_rcg2 gcc_pdm2_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_pdm2_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -633,7 +633,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_sdcc1_apps_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -652,7 +652,7 @@ static struct clk_rcg2 gcc_usb30_master_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_usb30_master_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -671,7 +671,7 @@ static struct clk_rcg2 gcc_usb30_mock_utmi_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_usb30_mock_utmi_clk_src",
> .parent_data = gcc_parents_0,
> - .num_parents = 4,
> + .num_parents = ARRAY_SIZE(gcc_parents_0),
> .ops = &clk_rcg2_ops,
> },
> };
> @@ -691,7 +691,7 @@ static struct clk_rcg2 gcc_usb3_phy_aux_clk_src = {
> .clkr.hw.init = &(struct clk_init_data){
> .name = "gcc_usb3_phy_aux_clk_src",
> .parent_data = gcc_parents_4,
> - .num_parents = 3,
> + .num_parents = ARRAY_SIZE(gcc_parents_4),
> .ops = &clk_rcg2_ops,
> },
> };
