Sony's seine board features an SD Card slot on SDHCI 2, that is to be powered by l5 and l22. The card detect pin is already biased via updates on the generic sdc2_*_state pinctrl nodes. As usual regulator voltages are decreased to the maximum voted by the downstream driver for safety. SDHCI 2 is the only hardware block feeding off of these. Signed-off-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx> --- .../dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts index eaddbe522695..4c9b8ad77dd9 100644 --- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts +++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts @@ -318,7 +318,8 @@ pm6125_l4: l4 { pm6125_l5: l5 { regulator-min-microvolt = <1648000>; - regulator-max-microvolt = <3104000>; + regulator-max-microvolt = <2950000>; + regulator-allow-set-load; }; pm6125_l6: l6 { @@ -404,7 +405,8 @@ pm6125_l21: l21 { pm6125_l22: l22 { regulator-min-microvolt = <2944000>; - regulator-max-microvolt = <3304000>; + regulator-max-microvolt = <2950000>; + regulator-allow-set-load; }; pm6125_l23: l23 { @@ -444,6 +446,15 @@ &sdhc_1 { status = "okay"; }; +&sdhc_2 { + cd-gpios = <&tlmm 98 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&pm6125_l22>; + vqmmc-supply = <&pm6125_l5>; + no-sdio; + no-mmc; + status = "okay"; +}; + &tlmm { gpio-reserved-ranges = <22 2>, <28 6>; -- 2.39.0