On Thu, Dec 22, 2022 at 07:01:22PM +0530, Manivannan Sadhasivam wrote: > The Qcom PCIe controller is capable of using either internal MSI controller > or the external GIC-ITS for receiving the MSIs from endpoint devices. > Currently, the binding only documents the internal MSI implementation. > > Let's document the GIC-ITS imeplementation by making use of msi-map and > msi-map-mask properties. Only one of the implementation should be used > at a time. Isn't that up to the OS to decide? Some versions may not support MSIs. What about legacy interrupts? Don't you need to keep the interrupt properties for them? > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 02450fb26bb9..10fec6a7abfc 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -104,14 +104,20 @@ required: > - compatible > - reg > - reg-names > - - interrupts > - - interrupt-names > - - "#interrupt-cells" > - interrupt-map-mask > - interrupt-map > - clocks > - clock-names > > +oneOf: > + - required: > + - interrupts > + - interrupt-names > + - "#interrupt-cells" > + - required: > + - msi-map > + - msi-map-mask > + > allOf: > - $ref: /schemas/pci/pci-bus.yaml# > - if: > -- > 2.25.1 > >
