Re: [PATCH v2 00/21] Add Tegra20 parallel video input capture

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Hello Dmitry,

thanks for your review.

On Tue, 20 Dec 2022 23:21:49 +0300
Dmitry Osipenko <digetx@xxxxxxxxx> wrote:

> 28.11.2022 18:23, Luca Ceresoli пишет:
> > Tegra20 and other Tegra SoCs have a video input (VI) peripheral that can
> > receive from either MIPI CSI-2 or parallel video (called respectively "CSI"
> > and "VIP" in the documentation). The kernel currently has a staging driver
> > for Tegra210 CSI capture. This patch set adds support for Tegra20 VIP
> > capture.
> > 
> > Unfortunately I had no real documentation available to base this work on.
> > I only had a working downstream 3.1 kernel, so I started with the driver
> > found there and heavily reworked it to fit into the mainline tegra-video
> > driver structure. The existing code appears written with the intent of
> > being modular and allow adding new input mechanisms and new SoCs while
> > keeping a unique VI core module. However its modularity and extensibility
> > was not enough to add Tegra20 VIP support, so I added some hooks to turn
> > hard-coded behaviour into per-SoC or per-bus customizable code. There are
> > also a fix, some generic cleanups and DT bindings.
> > 
> > Quick tour of the patches:
> > 
> >  * Device tree bindings and minor DTS improvements
> > 
> >    01. dt-bindings: display: tegra: add Tegra20 VIP
> >    02. dt-bindings: display: tegra: vi: add 'vip' property and example  
> 
> This series adds the new DT node, but there are no board DTs in upstream
> that will use VIP? Will we see the board patches?

I'm afraid I have no such plan. I don't have any public hardware with
Tegra20, with or without a parallel sensor. I have a custom board.

> In any case, given that you're likely the only one here who has access
> to hardware with VIP, 

Likely indeed.

> you should promote yourself to the tegra-video
> driver maintainers and confirm that you will be able to maintain and
> test this code for years to come.

I can definitely add myself as a maintainer of this driver and join the
maintenance effort, I'm adding that in v3. I also have a board that I
can permanently use for testing.

-- 
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com




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