[PATCH v2 0/9] Add IRQC support to RZ/G2UL SoC

[Prabhakar <prabhakar.csengg@xxxxxxxxx>]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>

Hi All,

This patch series does the following:
* Adds IRQC support to the RZ/G2UL SoC.
* Drops mapping NMI interrupt as part of IRQ domain
* Parses interrupts based in interrupt-names
* Includes a fix for pinctrl driver when using GPIO pins as interrupts
* Adds PHY interrupt support for ETH{0/1}

v1->v2
* Updated binding doc
* Dropped mapping NMI interrupt as part of IRQ domain
* Fixed review comments pointed by Geert
* Added support to parse interrupts by name
* Added compile time checks for gpio config arrays

RFC v1: https://patchwork.kernel.org/project/linux-renesas-soc/cover/20221107175305.63975-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/

Cheers,
Prabhakar

Lad Prabhakar (9):
  dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document
    RZ/G2UL SoC
  dt-bindings: interrupt-controller: irqc-rzg2l: Drop RZG2L_NMI macro
  irqchip: irq-renesas-rzg2l: Skip mapping NMI interrupt as part of
    hierarchy domain
  irqchip: irq-renesas-rzg2l: Add support for RZ/G2UL SoC
  pinctrl: renesas: rzg2l: Fix configuring the GPIO pins as interrupts
  pinctrl: renesas: rzg2l: Add BUILD_BUG_ON() checks
  arm64: dts: renesas: r9a07g043u: Add IRQC node
  arm64: dts: renesas: r9a07g043[u]: Update pinctrl node to handle GPIO
    interrupts
  arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for
    ETH{0/1}

 .../renesas,rzg2l-irqc.yaml                   | 240 +++++++++++++-----
 arch/arm64/boot/dts/renesas/r9a07g043.dtsi    |   2 +
 arch/arm64/boot/dts/renesas/r9a07g043u.dtsi   |  72 ++++++
 .../boot/dts/renesas/rzg2ul-smarc-som.dtsi    |  11 +-
 drivers/irqchip/irq-renesas-rzg2l.c           | 102 ++++++--
 drivers/pinctrl/renesas/pinctrl-rzg2l.c       |  25 +-
 .../interrupt-controller/irqc-rzg2l.h         |   3 -
 7 files changed, 366 insertions(+), 89 deletions(-)

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2.25.1