On Fri, Oct 31, 2014 at 8:52 AM, Gregory CLEMENT
<gregory.clement@xxxxxxxxxxxxxxxxxx> wrote:
> Hi Linus,
>>> + switch (mvchip->soc_variant) {
>>> + case MVEBU_GPIO_SOC_VARIANT_ORION:
>>> + mvchip->edge_mask_regs[0] =
>>> + readl(mvchip->membase + GPIO_EDGE_MASK_OFF);
>>> + mvchip->level_mask_regs[0] =
>>> + readl(mvchip->membase + GPIO_LEVEL_MASK_OFF);
>>> + break;
>>
>> You are assigning index [0] twice, why? There must be some
>> reason, and it should be stated in a comment. If the first read
>> is necessary for hardware reasons, don't assign it but
>> discard the result.
>
> Maybe I missed something but for me these 2 registers are different:
> one is the _EDGE_ mask and the other the _LEVEL_ mask.
Yeah haha I must have had a bad perception day :D
Yours,
Linus Walleij
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