Sali Lucas On Tue, 2022-12-13 at 17:01 +0100, Lucas Stach wrote: > The HSIO blk-ctrl has a internal PLL, which can be used as a reference > clock for the PCIe PHY. Add clock-cells to the binding to allow the > driver to expose this PLL. Nice! This indeed works fine on Verdin iMX8M Plus as well. Thanks! > Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx> Entire series: Tested-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx> > --- > .../devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml > b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml > index c29181a9745b..1cc7c2bdf2bb 100644 > --- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml > +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml > @@ -39,6 +39,9 @@ properties: > - const: pcie > - const: pcie-phy > > + '#clock-cells': > + const: 1 > + > clocks: > minItems: 2 > maxItems: 2 > @@ -85,4 +88,5 @@ examples: > power-domain-names = "bus", "usb", "usb-phy1", > "usb-phy2", "pcie", "pcie-phy"; > #power-domain-cells = <1>; > + #clock-cells = <0>; > };
