On 12/13/2022 8:24 PM, Johan Hovold wrote:
On Mon, Dec 12, 2022 at 01:23:11PM -0500, Brian Masney wrote:According to the downstream 5.4 kernel sources for the sa8540p, i2c@894000 is labeled i2c bus 21, not 5. The interrupts and clocks also match. Let's go ahead and correct the name that's used in the three files where this is listed. Signed-off-by: Brian Masney <bmasney@xxxxxxxxxx> Fixes: 152d1faf1e2f3 ("arm64: dts: qcom: add SC8280XP platform") Fixes: ccd3517faf183 ("arm64: dts: qcom: sc8280xp: Add reference device") Fixes: 32c231385ed43 ("arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetree")diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..875cc91324ce 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -827,7 +827,7 @@ qup2_uart17: serial@884000 { status = "disabled"; };- qup2_i2c5: i2c@894000 {+ qup2_i2c21: i2c@894000 {Note that the node is labelled qup2_i2c5 and not qup_i2c5. That is, the QUP nodes are labelled using two indices, and specifically qup2_i2c5 would be another name for qup_i2c21 if we'd been using such a flat naming scheme (there are 8 engines per QUP). So there's nothing wrong with how these nodes are currently named, but mixing the two scheme as you are suggesting would not be correct.
Wondering we might need to change qup2_uart17 to qup2_uart1 then ? Shazad
Johan
