There is only one USB controller present on SM6115 / SM4250
Qualcomm SoC, so drop the numbering used with USB nodes
in the dtsi and the related sm4250-oneplus-billie2.dts.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm6115.dtsi | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
index a3f1c7c41fd73..fa57f4bf58256 100644
--- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
+++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
@@ -225,11 +225,11 @@ &ufs_mem_phy {
status = "okay";
};
-&usb_1 {
+&usb {
status = "okay";
};
-&usb_1_hsphy {
+&usb_hsphy {
vdd-supply = <&vreg_l4a>;
vdda-pll-supply = <&vreg_l12a>;
vdda-phy-dpdm-supply = <&vreg_l15a>;
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 572bf04adf906..b5f7480c2e713 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -565,7 +565,7 @@ gcc: clock-controller@1400000 {
#power-domain-cells = <1>;
};
- usb_1_hsphy: phy@1613000 {
+ usb_hsphy: phy@1613000 {
compatible = "qcom,sm6115-qusb2-phy";
reg = <0x01613000 0x180>;
#phy-cells = <0>;
@@ -991,7 +991,7 @@ spi5: spi@4a94000 {
};
};
- usb_1: usb@4ef8800 {
+ usb: usb@4ef8800 {
compatible = "qcom,sm6115-dwc3", "qcom,dwc3";
reg = <0x04ef8800 0x400>;
#address-cells = <1>;
@@ -1019,11 +1019,11 @@ usb_1: usb@4ef8800 {
qcom,select-utmi-as-pipe-clk;
status = "disabled";
- usb_1_dwc3: usb@4e00000 {
+ usb_dwc3: usb@4e00000 {
compatible = "snps,dwc3";
reg = <0x04e00000 0xcd00>;
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb_1_hsphy>;
+ phys = <&usb_hsphy>;
phy-names = "usb2-phy";
iommus = <&apps_smmu 0x120 0x0>;
snps,dis_u2_susphy_quirk;
--
2.38.1
