Re: [PATCH 1/4] ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 12/12/22 09:51, patrice.chotard@xxxxxxxxxxx wrote:
From: Patrice Chotard <patrice.chotard@xxxxxxxxxxx>

Chip select pinctrl phandle was missing in several stm32mp15x based boards.

Fixes: ea99a5a02ebc ("ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi)

Signed-off-by: Patrice Chotard <patrice.chotard@xxxxxxxxxxx>
Cc: Marek Vasut <marex@xxxxxxx>
Cc: Alexandre Torgue <alexandre.torgue@xxxxxx>
Cc: linux-stm32@xxxxxxxxxxxxxxxxxxxxxxxxxxxx
To: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
---
  arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 8 ++++++--
  1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
index 134a798ad3f2..bb40fb46da81 100644
--- a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
+++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
@@ -247,8 +247,12 @@ &pwr_regulators {
&qspi {
  	pinctrl-names = "default", "sleep";
-	pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
-	pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
+	pinctrl-0 = <&qspi_clk_pins_a
+		     &qspi_bk1_pins_a
+		     &qspi_cs1_pins_a>;
+	pinctrl-1 = <&qspi_clk_sleep_pins_a
+		     &qspi_bk1_sleep_pins_a
+		     &qspi_cs1_sleep_pins_a>;
  	reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
  	#address-cells = <1>;
  	#size-cells = <0>;


Splitting the pins makes sense indeed.

Reviewed-by: Marek Vasut <marex@xxxxxxx>



[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux