Hi, On Fri, Dec 9, 2022 at 2:25 AM Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> wrote: > > On 02/12/2022 17:53, Doug Anderson wrote: > > Hi, > > > > On Fri, Dec 2, 2022 at 7:57 AM Krzysztof Kozlowski > > <krzysztof.kozlowski@xxxxxxxxxx> wrote: > >> > >> DT schema expects TLMM pin configuration nodes to be named with > >> '-state' suffix and their optional children with '-pins' suffix. > >> > >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> > >> > >> --- > >> > >> Cc: Doug Anderson <dianders@xxxxxxxxxxxx> > >> > >> Tested on Qualcomm RB3. Please kndly test a bit more on other devices. > >> This should not have an functional impact. > >> > >> Changes since v2: > >> 1. Bring back UART6 4-pin bias/drive strength to DTSI. > > > > Just to be clear, it doesn't actually belong in the DTSI, but it was > > there before your patch and it's fine if your patch series doesn't fix > > the whole world. I'm OK with this one staying in the DTSI for now just > > to keep things simpler. > > > > One change missing in v3 that I would have expected based on our > > discussion in the previous version would be to "Add UART3 4-pin mux > > settings for use in db845c." I think you said you would do this, but I > > don't see it done. > > Hm, I don't recall that. Changing db845c to usage of RTS/CTS is > independent problem, not related to fixes or aligning with DT schema. It was in the message: https://lore.kerne.org/r/68bcdf25-e8e3-f817-f213-efb0bce3f43a@xxxxxxxxxx I said: > FWIW, I would have expected that the SoC dtsi file would get a "4-pin" > definition (similar to what you did with qup_uart6_4pin) and then we'd > use that here. You said: > Sure. -Doug
